1. Field of the Invention
The invention relates to charge-transfer or charge-coupled devices (CCDs).
A CCD shift register is constituted by a succession of electrodes juxtaposed above a surface semiconductor zone: the electrodes are generally insulated from this zone by a very thin insulating layer.
The application of appropriate potentials to the electrodes enables the creation, in the semiconductor, of potential wells in which the mobile electrical charges can collect. Appropriate modifications of potentials enable these charges to be shifted from one well into an adjacent well, this being done in synchronism for all the wells of the register, so as to make the charge packets move forward towards the output of the register in synchronism. The charges that collect in the wells are introduced either by an upline end of the register or in parallel in all the wells. These charges represent information elements, for example the luminance of each pixel of an image line in the case of a shift register associated with a photosensitive image sensor.
The packets of electrical charges conveyed by the register may be converted into electrical voltages at the output of the register. These voltages are then processed by analog or logic circuits. To this end, a charge/voltage conversion device, also called a charge-reading device, is placed at the output of the register.
The reading device works in synchronism with the register, so that each packet of charges that reaches the reading device can be converted into an electrical voltage that is transmitted to a downline circuit (usually constituted by a sample-and-hold device), before a new packet of charges reaches the reading device.
2. Description of the Prior Art
The simplest reading device, shown in symbolic form in FIG. 1, is constituted by:
a capacitor C having an electrode with fixed potential (electrical ground for example) and an electrode with variable potential, PA1 a transistor T for the periodic precharging of the capacitor at another fixed potential (Vdr), PA1 and an amplifier A, at high input impedance, connected to the capacitor, to detect the potential at the terminals of this capacitor.
The output voltage Vs of the amplifier represents the output signal of the reading device, proportional to the quantity of charges contained in the packet read.
Before the beginning of a reading operation, the transistor T is made conductive so that the electrode with variable potential, which is connected to the transistor, the precharging fixed potential Vdr. The precharging potential Vdr is positive in the usual case where the charges conveyed are negative (electrons).
Then, the transistor T is turned off and a packet of charges is shifted, by means of the last electrode of the register R, to the electrode with variable potential of the capacitor. The potential of this electrode, which is initially at Vdr, drops by a value V1 that is proportional to the quantity of charges of the packet. The voltage Vs=G (Vdr-V1), which appears at the output S of the amplifier A with a gain G, is a linear function of the voltage drop V1. This voltage drop V1 is itself equal to the ratio of the quantity of charges Q shifted to the capacitor C to the value of this capacitor C. EQU V1=Q/C
The reading device then has what is known as a conversion factor Ks, equal to qG/C, where q is the charge of an electron; this conversion factor represents the value of the voltage increment appearing at the output S of the device (i.e. at the output of the amplifier A) when a charge increment (an electron) is shifted to the capacitor C.
If small quantities of charges are to be read, for example the charges resulting from a low illumination of a photodiode, it is useful for the conversion factor Ks to be high. This result can be obtained with a sufficiently high gain G and a low-value capacitor C.
However, the technological imperatives of CCDs dictate that, in practice, the amplifier A is formed with insulated-gate field-effect transistors (MOS transistors). These amplifiers have substantial noise at the input, and this noise is amplified with the gain G. It is therefore desirable not to have an excessive gain. In practice, even follower amplifiers with a gain of less than 1 are used. It is then the value of the capacitor C that must be substantially reduced to have a substantial conversion factor Ks.
The device most frequently used to form this capacitor is a reverse-biased PN junction diode. The grounded electrode is the substrate (in principle a P type substrate) of the semiconductor in which the CCD register is formed, and the other electrode of the diode is constituted by an N.sup.+ type diffused on the surface in the substrate and placed immediately beside the last electrode of the register, so that a packet of charges flowing in the register can be shifted directly into the N.sup.+ diffused zone.
FIG. 2 shows a top view (FIG. 2a) and a longitudinal section (FIG. 2b) of the principle of the construction of a reading device such as this at the output of a register. The register R comprises an alternation of storage electrodes Es and transfer electrodes Et. The last storage electrode is generally followed by an output electrode Gs with fixed potential, which itself is followed by the reading diode D (N.sup.+ diffusion) and is immediately adjacent to this diode. The N.sup.+ transistor constitutes, at the same time, the source of the precharging transistor and it is therefore separated from another N.sup.+ diffusion (D'), constituting the drain of this transistor, by an insulated control gate Gc. The drain D' is connected to a voltage source Vdr. The N.sup.+ diffusion of the diode D is connected by a surface electrical contact to the input of the amplifier A. The amplifier is shown in a symbolic form in FIG. 2.
In FIG. 2, heavy dashes have been used to show the lateral limits of the channel CH in which there flow the charges beneath the electrodes. This channel is defined by the semiconductor zone, with the electrodes of the register overhanging this semiconductor zone, and is separated from these electrodes by a very thin insulator layer; the channel CH may be demarcated laterally by the thick silicon oxide on which there rises the lateral edges of the electrodes. The N.sup.+ diffusion of the diode D is in the prolongation of this channel and is itself surrounded by thick oxide, just like the drain D'. The section of FIG. 2b is taken along the axis of the channel CH and therefore does not allow the thick silicon oxide surrounding the channel to be seen. However, a zone of thick oxide has been shown beyond the drain D' of the transistor.
In the case of FIG. 2, the reading diode D is adjacent to the entire width of the electrodes of the register (a width of 20 to 100 micrometers for example). It is therefore hardly possibly to consider it as having a small surface area, and the conversion factor of the reading device is fairly small).
This is why a device has already been proposed in the prior art (see for example EP 0242 291), of the type shown in FIG. 3, wherein the diode actually has a small surface area (for example 5 micrometers by 5 micrometers); the channel CH in which the charges flow gradually narrows towards this diode.
To improve the transfer in making the paths of the charges uniform, the electrodes are in the form of ring sectors in the vicinity of the diode.
A compromise has thus been obtained between the need for a sufficient width of the register (to convey substantial quantities of charge, corresponding for example to an intense illumination of a photodiode) and a small-sized reading diode (to enable the reading of the small quantities of charges with an appropriate signal-to-noise ratio).
It is noted that, in the device of FIG. 3, the storage electrodes Es have, in principle, a length L (in the longitudinal direction, i.e. in the direction of transfer of the charges) that gradually increases in order to keep a storage surface area more or less constant despite the gradual reduction of the width of the channel.
Reasons for which an explanation shall be attempted below have led to the observation that the structure of FIG. 3 has drawbacks, precisely due to the narrowing of the channel. The present invention is aimed at reducing these drawbacks while, at the same time, keeping the advantage of a small reading capacity (this is the advantage of a high conversion factor without excessive deterioration of the signal-to-noise ratio in the small-amplitude signals).
To attain this goal, the invention proposes to obtain a result where the width of the last gate of the register, adjacent to a small-sized reading diode, is appreciably greater (with respect to the surface area of the reading diode) than in the prior art. The word "width" is taken here, and in the rest of this document, to be a dimensional measurement along a line that is substantially perpendicular to the path of the electrical charges.